Integrated circuit memories are frequently characterized as being divided into sub-arrays, or blocks, of memory cells. One of the typical reasons that a block architecture is chosen is to save power. One approach in developing block architectures in static random access memories has been the use of divided word lines. One use of divided word lines for a block architecture is shown in U.S. Pat. No. 4,698,788, Flannagan et al.
Another feature in integrated circuit memories that has been shown to have advantages is redundancy. Redundant rows and columns are included in addition to the normal array of rows and columns. The redundant rows and columns are present to replace rows and columns which are found to have one or more bad bits. Row and column decoders are programmable to perform the needed replacement. Out of hundreds of thousands of bits in the memory there may be only a few bad bits so that a small amount of redundancy can result in quite large increases in yield.
A problem that has arisen in providing redundancy in a block architecture memory is how to efficiently implement the redundancy. The problem has been that each sub-array has had its own redundant rows and columns. This has been inefficient use of redundancy because the redundant rows and columns could only replace defective rows and columns in the same sub-array as that of the redundant rows and columns. This has greatly multiplied the total number of redundant rows and columns required to provide good utility of redundancy.
Another aspect of redundancy that has been a problem is in the case of the memory having a byte-wide (.times.8) or nibble-wide (.times.4) output. In such a memory, each column comprises a plurality of bit lines or bit line pairs. Typically a redundant column would be required to replace a column which had defective bits although only a single bit line or bit line pair may be defective. This then is an inefficient use of redundancy. A solution to this problem was described in U.S. Pat. No. 4,601,019, Shah et al but still required a redundant column for each block.